Publication:
High NA EUV single patterning of advanced metal logic nodes: Inverse lithography techniques in combination with alternative mask absorbers
| dc.contributor.author | Armeanu, Ana-Maria | |
| dc.contributor.author | Pellens, Nick | |
| dc.contributor.author | Philipsen, Vicky | |
| dc.contributor.author | Malankin, Evgeny | |
| dc.contributor.author | Xu, Dongbo | |
| dc.contributor.author | Mizuuchi, Keisuke | |
| dc.contributor.author | Curvacho, Gabriel | |
| dc.contributor.author | Wei, Chih-, I | |
| dc.contributor.author | Lafferty, Neal | |
| dc.contributor.author | Fenger, Germain | |
| dc.contributor.imecauthor | Pellens, Nick | |
| dc.contributor.imecauthor | Philipsen, Vicky | |
| dc.contributor.orcidimec | Pellens, Nick::0000-0001-5527-5130 | |
| dc.contributor.orcidimec | Philipsen, Vicky::0000-0002-2959-432X | |
| dc.date.accessioned | 2025-06-20T08:42:29Z | |
| dc.date.available | 2024-11-16T16:49:19Z | |
| dc.date.available | 2025-06-20T08:42:29Z | |
| dc.date.issued | 2024 | |
| dc.description.wosFundingText | We would like to thank Peter De Bisschop (imec) for the input layout used in this study and fruitful discussions. Equally, we want to thank Joerg Zimmermann (Zeiss) for source pixelization. This work is partially founded by the European Union by 10ACE (Project: 101139972 -10ACe -HORIZONKDT-JU-2023-1-IA). Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or the Chips Joint Undertaking. Neither the European Union nor the granting authority can be held responsible for them. | |
| dc.identifier.doi | 10.1117/12.3031718 | |
| dc.identifier.eisbn | 978-1-5106-8289-4 | |
| dc.identifier.isbn | 978-1-5106-8288-7 | |
| dc.identifier.issn | 0277-786X | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/44792 | |
| dc.publisher | SPIE-INT SOC OPTICAL ENGINEERING | |
| dc.source.beginpage | Art. 132731M | |
| dc.source.conference | 39th European Mask and Lithography Conference (EMLC) | |
| dc.source.conferencedate | JUN 17-19, 2024 | |
| dc.source.conferencelocation | Grenoble | |
| dc.source.endpage | N/A | |
| dc.source.journal | Proceedings of SPIE | |
| dc.source.numberofpages | 13 | |
| dc.source.volume | 13273 | |
| dc.title | High NA EUV single patterning of advanced metal logic nodes: Inverse lithography techniques in combination with alternative mask absorbers | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
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