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LionHeart: A Layer-Based Mapping Framework for Heterogeneous Systems With Analog In-Memory Computing Tiles

 
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid0000-0002-4958-9990
cris.virtualsource.departmenta219045b-5658-464b-83e3-7d71c44aae25
cris.virtualsource.orcida219045b-5658-464b-83e3-7d71c44aae25
dc.contributor.authorLammie, Corey
dc.contributor.authorWang, Yuxuan
dc.contributor.authorPonzina, Flavio
dc.contributor.authorKlein, Joshua
dc.contributor.authorBenmeziane, Hadjer
dc.contributor.authorZapater, Marina
dc.contributor.authorBoybat, Irem
dc.contributor.authorSebastian, Abu
dc.contributor.authorAnsaloni, Giovanni
dc.contributor.authorAtienza, David
dc.date.accessioned2026-06-10T10:30:04Z
dc.date.available2026-06-10T10:30:04Z
dc.date.createdwos2025-12-23
dc.date.issued2025
dc.description.abstractWhen arranged in a crossbar configuration, resistive memory devices can be used to execute Matrix-Vector Multiplications (MVMs), the most dominant operation of many Machine Learning (ML) algorithms, in constant time complexity. Nonetheless, when performing computations in the analog domain, novel challenges are introduced in terms of arithmetic precision and stochasticity, due to non-ideal circuit and device behaviour. Moreover, these non-idealities have a temporal dimension, resulting in a degrading application accuracy over time. Facing these challenges, we propose a novel framework, named LionHeart, to obtain hybrid analog-digital mappings to execute Deep Learning (DL) inference workloads using heterogeneous accelerators. The accuracy-constrained mappings derived by LionHeart showcase, across different Convolutional Neural Networks (CNNs) and one transformer-based network, high accuracy and potential for speedup. The results of the full system simulations highlight run-time reductions and energy efficiency gains that exceed 6×, with a user-defined accuracy threshold for a fully digital floating point implementation.
dc.description.wosFundingTextThis work was supported in part by the Swiss NSF Edge-Companions project under Grant 10002812, in part by the EC H2020 FVLLMONTI Project under Grant 101016776, in part by the ACCESS-AI Chip Center for Emerging Smart Systems, sponsored by InnoHK funding, Hong Kong, SAR, in part by the Swiss State Secretariat for Education, Research, and Innovation (SERI) through the SwissChips Research Project, and in part by EC H2020 WiPLASH under Grant 863337.
dc.identifier.doi10.1109/tetc.2025.3546128
dc.identifier.issn2168-6750
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/59657
dc.language.isoeng
dc.provenance.editstepusergreet.vanhoof@imec.be
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
dc.source.beginpage1383
dc.source.endpage1395
dc.source.issue4
dc.source.journalIEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING
dc.source.numberofpages13
dc.source.volume13
dc.subject.keywordsEFFICIENT
dc.title

LionHeart: A Layer-Based Mapping Framework for Heterogeneous Systems With Analog In-Memory Computing Tiles

dc.typeJournal article
dspace.entity.typePublication
imec.internal.crawledAt2026-04-07
imec.internal.sourcecrawler
imec.internal.wosCreatedAt2026-04-07
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