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A 0.9V low-power 0.4-6GHz linear SDR receiver in 28nm CMOS

Date

2013
Proceedings Paper
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dc.contributor.authorBorremans, Jonathan
dc.contributor.authorvan Liempd, Barend
dc.contributor.authorMartens, Ewout
dc.contributor.authorCha, Sungwoo
dc.contributor.authorCraninckx, Jan
dc.contributor.imecauthorvan Liempd, Barend
dc.contributor.imecauthorMartens, Ewout
dc.contributor.imecauthorCraninckx, Jan
dc.contributor.orcidimecvan Liempd, Barend::0000-0001-6877-8116
dc.contributor.orcidimecCraninckx, Jan::0000-0002-3980-0203
dc.date.accessioned2021-10-21T06:48:36Z
dc.date.available2021-10-21T06:48:36Z
dc.date.embargo9999-12-31
dc.date.issued2013
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/22066
dc.source.beginpageC146
dc.source.conferenceSymposium on VLSI Technology
dc.source.conferencedate11/06/2013
dc.source.conferencelocationKyoto Japan
dc.source.endpageC147
dc.title

A 0.9V low-power 0.4-6GHz linear SDR receiver in 28nm CMOS

dc.typeProceedings paper
dspace.entity.typePublication
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