Publication:

Novel Y-function based strategy for parameter extraction in S/D asymmetric architecture devices and low frequency noise characterization in GAA Si VNW pMOSFETs

Date

2023
Journal article
https://doi.org/10.1016/j.sse.2023.108709
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dc.contributor.authorTahiat, A.
dc.contributor.authorCretu, B.
dc.contributor.authorVeloso, Anabela
dc.contributor.authorSimoen, Eddy
dc.contributor.imecauthorVeloso, Anabela
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.date.accessioned2024-04-11T08:36:32Z
dc.date.available2023-11-08T17:27:51Z
dc.date.available2024-04-11T08:36:32Z
dc.date.issued2023
dc.identifier.doi10.1016/j.sse.2023.108709
dc.identifier.issn0038-1101
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/43117
dc.publisherPERGAMON-ELSEVIER SCIENCE LTD
dc.source.beginpageArt. 108709
dc.source.endpageN/A
dc.source.issueNovember
dc.source.journalSOLID-STATE ELECTRONICS
dc.source.numberofpages5
dc.source.volume209
dc.title

Novel Y-function based strategy for parameter extraction in S/D asymmetric architecture devices and low frequency noise characterization in GAA Si VNW pMOSFETs

dc.typeJournal article
dspace.entity.typePublication
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