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Massive MIMO processing at the semiconductor edge: exploiting the system and circuit margins for power savings

Date

2017
Proceedings Paper
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dc.contributor.authorHuang, Yanxiang
dc.contributor.authorDesset, Claude
dc.contributor.authorBourdoux, André
dc.contributor.authorDehaene, Wim
dc.contributor.authorVan der Perre, Liesbet
dc.contributor.imecauthorDesset, Claude
dc.contributor.imecauthorBourdoux, André
dc.contributor.imecauthorDehaene, Wim
dc.contributor.orcidimecDesset, Claude::0000-0002-5822-1688
dc.contributor.orcidimecBourdoux, André::0000-0002-9264-7850
dc.date.accessioned2021-10-24T06:00:42Z
dc.date.available2021-10-24T06:00:42Z
dc.date.embargo9999-12-31
dc.date.issued2017
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/28549
dc.identifier.urlhttp://ieeexplore.ieee.org/document/7952802/
dc.source.beginpage3474
dc.source.conferenceIEEE International Conference on Acoustics, Speech and Signal Processing - ICASSP
dc.source.conferencedate5/03/2017
dc.source.conferencelocationNew Orleans, LA USA
dc.source.endpage3478
dc.title

Massive MIMO processing at the semiconductor edge: exploiting the system and circuit margins for power savings

dc.typeProceedings paper
dspace.entity.typePublication
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