Publication:
Power consumption in reversible logic addressed by a ramp voltage
Date
| dc.contributor.author | De Vos, Alexis | |
| dc.contributor.author | Van Rentergem, Yvan | |
| dc.date.accessioned | 2021-10-16T01:12:31Z | |
| dc.date.available | 2021-10-16T01:12:31Z | |
| dc.date.issued | 2005 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/10328 | |
| dc.source.beginpage | 207 | |
| dc.source.conference | Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation.15th International Workshop PATMOS | |
| dc.source.conferencedate | 21/09/2005 | |
| dc.source.conferencelocation | Leuven Belgium | |
| dc.source.endpage | 216 | |
| dc.title | Power consumption in reversible logic addressed by a ramp voltage | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
| Files | ||
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