Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices

dc.contributor.author	Samudra, G.
dc.contributor.author	Krishnasamy, Rajendran
dc.date.accessioned	2021-10-14T13:42:35Z
dc.date.available	2021-10-14T13:42:35Z
dc.date.embargo	9999-12-31
dc.date.issued	2000
dc.identifier.uri	https://imec-publications.be/handle/20.500.12860/4717
dc.source.beginpage	513
dc.source.endpage	530
dc.source.issue	5
dc.source.journal	International Journal of Electronics
dc.source.volume	87
dc.title	Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices
dc.type	Journal article
dspace.entity.type	Publication
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