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A 1.8 pJ/b, 12.5--25 Gb/s wide range all-digital clock and data recovery circuit

Date

2018-02
Journal article
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dc.contributor.authorVerbeke, Marijn
dc.contributor.authorRombouts, Pieter
dc.contributor.authorRamon, Hannes
dc.contributor.authorMoeneclaey, Bart
dc.contributor.authorYin, Xin
dc.contributor.authorBauwelinck, Johan
dc.contributor.authorTorfs, Guy
dc.contributor.imecauthorRamon, Hannes
dc.contributor.imecauthorMoeneclaey, Bart
dc.contributor.imecauthorYin, Xin
dc.contributor.imecauthorBauwelinck, Johan
dc.contributor.imecauthorTorfs, Guy
dc.contributor.orcidimecMoeneclaey, Bart::0000-0002-9444-6235
dc.contributor.orcidimecYin, Xin::0000-0002-9672-6652
dc.contributor.orcidimecBauwelinck, Johan::0000-0001-5254-2408
dc.contributor.orcidimecTorfs, Guy::0000-0003-1817-5370
dc.date.accessioned2021-10-26T08:13:55Z
dc.date.available2021-10-26T08:13:55Z
dc.date.embargo9999-12-31
dc.date.issued2018-02
dc.identifier.issn0018-9200
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/32170
dc.identifier.urlhttp://ieeexplore.ieee.org/document/8060975/
dc.source.beginpage470
dc.source.endpage483
dc.source.issue2
dc.source.journalIEEE Journal of Solid-State Circuits
dc.source.volume53
dc.title

A 1.8 pJ/b, 12.5--25 Gb/s wide range all-digital clock and data recovery circuit

dc.typeJournal article
dspace.entity.typePublication
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