Publication:

A System Level Performance Evaluation for Superconducting Digital Systems

Date

2025
Proceedings Paper
https://doi.org/10.23919/DATE64628.2025.10992879
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dc.contributor.authorKundu, Joyjit
dc.contributor.authorBhattacharjee, Debjyoti
dc.contributor.authorJosephsen, Nathan
dc.contributor.authorPokhrel, Ankit
dc.contributor.authorDe Silva, Udara
dc.contributor.authorGuo, Wenzhe
dc.contributor.authorVan Winckel, Steven
dc.contributor.authorBrebels, Steven
dc.contributor.authorHerr, Quentin
dc.contributor.authorHerr, Anna
dc.contributor.authorPerumkunnil, Manu
dc.contributor.imecauthorKundu, Joyjit
dc.contributor.imecauthorBhattacharjee, Debjyoti
dc.contributor.imecauthorJosephsen, Nathan
dc.contributor.imecauthorPokhrel, Ankit
dc.contributor.imecauthorDe Silva, Udara
dc.contributor.imecauthorGuo, Wenzhe
dc.contributor.imecauthorVan Winckel, Steven
dc.contributor.imecauthorBrebels, Steven
dc.contributor.imecauthorHerr, Quentin
dc.contributor.imecauthorHerr, Anna
dc.contributor.imecauthorPerumkunnil, Manu
dc.contributor.orcidimecKundu, Joyjit::0000-0001-7736-6316
dc.contributor.orcidimecBhattacharjee, Debjyoti::0000-0001-6561-8934
dc.contributor.orcidimecPokhrel, Ankit::0009-0008-2524-3611
dc.contributor.orcidimecDe Silva, Udara::0000-0001-5731-7293
dc.contributor.orcidimecGuo, Wenzhe::0000-0003-2410-7315
dc.contributor.orcidimecVan Winckel, Steven::0000-0002-2219-4411
dc.contributor.orcidimecBrebels, Steven::0000-0002-1568-0286
dc.contributor.orcidimecHerr, Quentin::0000-0002-6864-2603
dc.contributor.orcidimecHerr, Anna::0000-0001-9247-0090
dc.contributor.orcidimecPerumkunnil, Manu::0000-0002-0029-6548
dc.date.accessioned2025-08-03T03:58:23Z
dc.date.available2025-08-03T03:58:23Z
dc.date.issued2025
dc.description.wosFundingTextThis work has been funded in part by imec INVEST+ fund, Oceola County Florida USA, and NSF Central Florida Semiconductor Engine.
dc.identifier.doi10.23919/DATE64628.2025.10992879
dc.identifier.eisbn978-3-9826741-0-0
dc.identifier.issn1530-1591
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/46015
dc.publisherIEEE
dc.source.beginpage1
dc.source.conference2025 Design, Automation & Test in Europe Conference-DATE
dc.source.conferencedate2025-03-31
dc.source.conferencelocationLyon
dc.source.journal2025 Design, Automation & Test in Europe Conference (DATE)
dc.source.numberofpages7
dc.title

A System Level Performance Evaluation for Superconducting Digital Systems

dc.typeProceedings paper
dspace.entity.typePublication
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