Publication:

n-bit Data Parallel Spin Wave Logic Gate

Date

2020
Proceedings Paper
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dc.contributor.authorMahmoud, Abdulqader
dc.contributor.authorVanderveken, Frederic
dc.contributor.authorCiubotaru, Florin
dc.contributor.authorAdelmann, Christoph
dc.contributor.authorCotofana, Sorin
dc.contributor.authorHamdioui, Said
dc.contributor.imecauthorVanderveken, Frederic
dc.contributor.imecauthorCiubotaru, Florin
dc.contributor.imecauthorAdelmann, Christoph
dc.contributor.orcidextCotofana, Sorin::0000-0001-7132-2291
dc.contributor.orcidimecAdelmann, Christoph::0000-0002-4831-3159
dc.contributor.orcidimecVanderveken, Frederic::0000-0002-1449-5732
dc.contributor.orcidimecCiubotaru, Florin::0000-0002-7088-2075
dc.date.accessioned2022-01-19T11:16:35Z
dc.date.available2021-11-02T16:05:40Z
dc.date.available2022-01-19T11:16:35Z
dc.date.issued2020
dc.identifier.eisbn978-3-9819263-4-7
dc.identifier.issn1530-1591
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/38219
dc.publisherIEEE
dc.source.beginpage642
dc.source.conferenceDesign, Automation and Test in Europe Conference and Exhibition (DATE)
dc.source.conferencedateMAR 09-13, 2020
dc.source.conferencelocationGrenoble
dc.source.endpage645
dc.source.journalna
dc.source.numberofpages4
dc.title

n-bit Data Parallel Spin Wave Logic Gate

dc.typeProceedings paper
dspace.entity.typePublication
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