Publication:
A Scalable Dynamic Segmented Bus Interconnect for Neuromorphic Architectures
| dc.contributor.author | Huynh, Phu Khanh | |
| dc.contributor.author | Mustafazade, Ilknur | |
| dc.contributor.author | Catthoor, Francky | |
| dc.contributor.author | Kandasamy, Nagarajan | |
| dc.contributor.author | Das, Anup | |
| dc.contributor.imecauthor | Catthoor, Francky | |
| dc.contributor.orcidimec | Catthoor, Francky::0000-0002-3599-8515 | |
| dc.date.accessioned | 2025-06-11T12:45:43Z | |
| dc.date.available | 2024-12-19T16:39:09Z | |
| dc.date.available | 2025-06-11T12:45:43Z | |
| dc.date.issued | 2024 | |
| dc.description.wosFundingText | This work was supported in part by the U.S. DOE under Award DE-SC0022014 and the U.S. NSF under Award CCF-1942697. | |
| dc.identifier.doi | 10.1109/LES.2024.3452551 | |
| dc.identifier.issn | 1943-0663 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/44998 | |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | |
| dc.source.beginpage | 505 | |
| dc.source.endpage | 508 | |
| dc.source.issue | 4 | |
| dc.source.journal | IEEE EMBEDDED SYSTEMS LETTERS | |
| dc.source.numberofpages | 4 | |
| dc.source.volume | 16 | |
| dc.title | A Scalable Dynamic Segmented Bus Interconnect for Neuromorphic Architectures | |
| dc.type | Journal article | |
| dspace.entity.type | Publication | |
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