DC and low a frequency noise analysis of p channel gate all around vertically stacked silicon nanosheets

dc.contributor.author	Cretu, B.
dc.contributor.author	Veloso, Anabela
dc.contributor.author	Simoen, Eddy
dc.contributor.imecauthor	Veloso, Anabela
dc.contributor.imecauthor	Simoen, Eddy
dc.contributor.orcidimec	Simoen, Eddy::0000-0002-5218-4046
dc.date.accessioned	2022-11-17T16:01:53Z
dc.date.available	2022-10-30T02:55:18Z
dc.date.available	2022-11-17T16:01:53Z
dc.date.issued	2022
dc.identifier.doi	10.1016/j.sse.2022.108360
dc.identifier.issn	0038-1101
dc.identifier.uri	https://imec-publications.be/handle/20.500.12860/40657
dc.publisher	PERGAMON-ELSEVIER SCIENCE LTD
dc.source.beginpage	108360
dc.source.endpage	na
dc.source.issue	na
dc.source.journal	SOLID-STATE ELECTRONICS
dc.source.numberofpages	4
dc.source.volume	194
dc.subject.keywords	ELECTRICAL NOISE
dc.subject.keywords	1/F NOISE
dc.subject.keywords	EXTRACTION
dc.subject.keywords	MOSFETS
dc.title	DC and low a frequency noise analysis of p channel gate all around vertically stacked silicon nanosheets
dc.type	Journal article
dspace.entity.type	Publication
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