Publication:

UTCP : 60 µm Thick Bendable Chip Package

Date

 
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid0000-0002-9654-7304
cris.virtual.orcid0000-0002-6753-6438
cris.virtualsource.department44a3a82b-55ff-4186-b5db-5e0130b85450
cris.virtualsource.department0aefe159-9129-4bab-908e-3a73693ee2e4
cris.virtualsource.orcid44a3a82b-55ff-4186-b5db-5e0130b85450
cris.virtualsource.orcid0aefe159-9129-4bab-908e-3a73693ee2e4
dc.contributor.authorChristiaens, W.
dc.contributor.authorVandevelde, Bart
dc.contributor.authorBosman, E.
dc.contributor.authorVanfleteren, Jan
dc.date.accessioned2025-12-08T14:34:58Z
dc.date.available2025-12-08T14:34:58Z
dc.date.issued2006-11
dc.description.abstractThis contribution describes modelling and technology for an Ultra-Thin Chip Package (UTCP), based on the embedding of ultrathin dies in flexible substrates. Chips with thickness in the range of 20 - 30 μm are packaged in between 2 polyimide layers. The result is a very thin chip package, with a total thickness of only 50 - 60 μm. Chip, PI layers and metal are so thin that the whole package is bendable. The base substrate is a uniform polyimide layer, applied (spin coated and cured) on a rigid carrier. Then the ultrathin chip is placed and fixed, using BCB as die attach material. Next, the second spin-on polyimide layer is applied and cured. Vias to the contacts of the chip are laser drilled and the contact metal layer is sputtered and photolithographically patterned. This metal layer is providing a fan out to the contacts of the chips. Finally the whole package is released from the rigid substrate. The resulting package can be SMD assembled on PCB or flex, or can be embedded in a stack of PCB layers, replacing for example the naked die - with the advantage that alignment constraints for the embedded package are not as severe as for the embedded die. Also the “Known Good Die” (KGD) issue is solved as the packaged chip can be tested before embedding. UTCP's have also the potential for stacking in order to obtain 3D type chip packages.
dc.identifier.doi10.37665/wabtidl26323
dc.identifier.issn3067-9052
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/58510
dc.publisherSMTA
dc.source.conferenceWafer Level Packaging Symposium
dc.source.conferencedate2006-11-01
dc.source.conferencelocationSan Jose
dc.source.journalWafer-Level Packaging Symposium
dc.title

UTCP : 60 µm Thick Bendable Chip Package

dc.typeProceedings paper
dspace.entity.typePublication
imec.internal.crawledAt2025-12-02
imec.internal.sourcecrawler
Files
Publication available in collections: