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Optimization of the MuGFET performance on super critical-strained SOI (SC-SSOI)substrates featuring raised source/drain and dual CESL

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dc.contributor.authorCollaert, Nadine
dc.contributor.authorRooyackers, Rita
dc.contributor.authorDilliway, Gabriela
dc.contributor.authorIyengar, Vikram
dc.contributor.authorAugendre, Emmanuel
dc.contributor.authorLeys, Frederik
dc.contributor.authorCayrefourcq, I.
dc.contributor.authorGhyselen, B.
dc.contributor.authorLoo, Roger
dc.contributor.authorJurczak, Gosia
dc.contributor.authorBiesemans, Serge
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorLoo, Roger
dc.contributor.imecauthorJurczak, Gosia
dc.contributor.imecauthorBiesemans, Serge
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.contributor.orcidimecLoo, Roger::0000-0003-3513-6058
dc.date.accessioned2021-10-16T15:22:23Z
dc.date.available2021-10-16T15:22:23Z
dc.date.issued2007
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/11896
dc.source.conferenceInternational Symposium on VLSI Technology, Systems, and Applications - VLSI-TSA
dc.source.conferencedate23/04/2007
dc.source.conferencelocationHsinchu Taiwan
dc.title

Optimization of the MuGFET performance on super critical-strained SOI (SC-SSOI)substrates featuring raised source/drain and dual CESL

dc.typeProceedings paper
dspace.entity.typePublication
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