Fractional-N Sub-Sampling PLL Using a Calibrated Delay Line for Phase Noise Cancellation

dc.contributor.author	Renukaswamy, Pratap
dc.contributor.author	Markulic, Nereo
dc.contributor.author	Wambacq, Piet
dc.contributor.author	Craninckx, Jan
dc.contributor.imecauthor	Renukaswamy, Pratap
dc.contributor.imecauthor	Markulic, Nereo
dc.contributor.imecauthor	Wambacq, Piet
dc.contributor.imecauthor	Craninckx, Jan
dc.contributor.orcidimec	Markulic, Nereo::0000-0001-6691-4647
dc.contributor.orcidimec	Wambacq, Piet::0000-0003-4388-7257
dc.contributor.orcidimec	Craninckx, Jan::0000-0002-3980-0203
dc.contributor.orcidimec	Renukaswamy, Pratap::0000-0003-4148-7188
dc.date.accessioned	2022-03-17T12:59:20Z
dc.date.available	2022-03-17T12:59:20Z
dc.date.issued	2021
dc.identifier.doi	10.1109/ISCAS51556.2021.9401690
dc.identifier.eisbn	978-1-7281-9201-7
dc.identifier.issn	0271-4302
dc.identifier.uri	https://imec-publications.be/handle/20.500.12860/39487
dc.publisher	IEEE
dc.source.conference	IEEE International Symposium on Circuits and Systems (IEEE ISCAS)
dc.source.conferencedate	MAY 22-28, 2021
dc.source.conferencelocation	Daegu
dc.source.journal	na
dc.source.numberofpages	5
dc.subject.keywords	SUBSAMPLING PLL
dc.title	Fractional-N Sub-Sampling PLL Using a Calibrated Delay Line for Phase Noise Cancellation
dc.type	Proceedings paper
dspace.entity.type	Publication
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