Publication:

Die stacking using 3D-wafer level packaging copper/polymer through-Si via technology and Cu/Sn interconnect bumping

Date

2009
Proceedings Paper
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dc.contributor.authorCivale, Yann
dc.contributor.authorSabuncuoglu Tezcan, Deniz
dc.contributor.authorPhilipsen, Harold
dc.contributor.authorJaenen, Patrick
dc.contributor.authorAgarwal, Rahul
dc.contributor.authorDuval, Fabrice
dc.contributor.authorSoussan, Philippe
dc.contributor.authorTravaly, Youssef
dc.contributor.authorBeyne, Eric
dc.contributor.imecauthorSabuncuoglu Tezcan, Deniz
dc.contributor.imecauthorPhilipsen, Harold
dc.contributor.imecauthorJaenen, Patrick
dc.contributor.imecauthorDuval, Fabrice
dc.contributor.imecauthorSoussan, Philippe
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecSabuncuoglu Tezcan, Deniz::0000-0002-9237-7862
dc.contributor.orcidimecPhilipsen, Harold::0000-0002-5029-1104
dc.contributor.orcidimecSoussan, Philippe::0000-0002-1347-6978
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.date.accessioned2021-10-17T21:36:14Z
dc.date.available2021-10-17T21:36:14Z
dc.date.embargo9999-12-31
dc.date.issued2009
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15102
dc.source.conferenceIEEE International Conference on 3D System Integration
dc.source.conferencedate28/09/2009
dc.source.conferencelocationSan Francisco, CA USA
dc.title

Die stacking using 3D-wafer level packaging copper/polymer through-Si via technology and Cu/Sn interconnect bumping

dc.typeProceedings paper
dspace.entity.typePublication
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