An Integrated PCB Platform for CMOS Variability and Aging Characterization of Array-Based ICs

Abstract

Characterizing variability and aging in CMOS circuits, such as ring oscillators (ROs), typically requires specialized laboratory equipment, including costly instrumentation and wafer probers for bare-die testing. In addition, statistical and long-term aging experiments, such as measuring bias temperature instability (BTI) and hot-carrier degradation (HCD), are often limited by restricted access to shared reliability labs and time-constrained measurement slots. To overcome these limitations, this article introduces a versatile PCB test platform that enables autonomous and accurate characterization of variability and aging effects in wire-bonded integrated circuits (ICs) for short-, mid-, and long-term reliability experiments. The PCB integrates the necessary hardware and software to perform statistical testing of RO circuits implemented in full-custom array chips. Its functionality is demonstrated with a custom IC fabricated in a commercially available 0.9-V, 28-nm HKMG CMOS technology. The proposed PCB includes tunable level shifters to adapt control signals for chips from different foundries and technology nodes, dedicated force-and-sense biasing channels to compensate on-chip voltage drops during testing, and a MicroMod Teensy processor for ultrafast RO frequency measurements. This work presents the PCB’s hardware architecture and the measurement methodology used to characterize the fabricated ICs.