Publication:

A scalable neural network emulator with MRAM-based mixed-signal circuits

Date

2025-JUN 9
Journal article
https://doi.org/10.3389/fnins.2025.1599144
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dc.contributor.authorLee, Jua
dc.contributor.authorSong, Jiho
dc.contributor.authorIm, Hyeon Seong
dc.contributor.authorKim, Jonghwi
dc.contributor.authorLee, Woonjae
dc.contributor.authorYi, Wooseok
dc.contributor.authorKwon, Soonwan
dc.contributor.authorJung, Byungsu
dc.contributor.authorKim, Joohyoung
dc.contributor.authorLee, Yoonmyung
dc.contributor.authorChun, Jung-Hoon
dc.contributor.imecauthorKim, Joohyoung
dc.date.accessioned2025-06-28T03:55:58Z
dc.date.available2025-06-28T03:55:58Z
dc.date.issued2025-JUN 9
dc.description.wosFundingTextThe author(s) declare that financial support was received for the research and/or publication of this article. This work was supported in part by the Samsung Electronics, and in part by the Korea Ministry of Trade, Industry, and Energy under the Fostering Global Talents for Innovative Growth Program (P0017312), and in part by the Korea Ministry of Science and Information Technology (No. 2022-0-01171).
dc.identifier.doi10.3389/fnins.2025.1599144
dc.identifier.pmidMEDLINE:40551852
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/45851
dc.publisherFRONTIERS MEDIA SA
dc.source.journalFRONTIERS IN NEUROSCIENCE
dc.source.numberofpages17
dc.source.volume19
dc.subject.keywordsON-CHIP
dc.subject.keywordsSYNAPSE
dc.subject.keywordsMEMORY
dc.subject.keywordsSYSTEM
dc.title

A scalable neural network emulator with MRAM-based mixed-signal circuits

dc.typeJournal article
dspace.entity.typePublication
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