The attractive properties of Two-Dimensional (2D) materials and Transition Metal Dichalcogenides (TMDs) hold significant potential for their use in the next generation of highly-scaled electronic devices. Despite remarkable technological improvements in the integration of this class of materials, the understanding of the carrier transport in these systems and of the possibilities to optimize the dielectric environment still demands in-depth study to reach the performance required by the next technological node. In this work we analyze the impact of the dielectric environment on the carrier transport in mono-layer (ML) MoS2 MOSFETs by employing low temperature Hall and transport measurements on dual-gate Hall bars structure fabricated with different top dielectric stacks. We demonstrate a clear difference in the temperature scaling of the maximal Field-Effect (FE) mobility values, pointing to fundamental differences in the mobility limiting mechanisms that can be attributed to variation in the remote phonon scattering for devices with different dielectric layers.