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A 56 Gb/s Zero-IF D-Band Beamforming Transmitter in 22 nm FD-SOI

 
dc.contributor.authorZhang, Yang
dc.contributor.authorVaesen, Kristof
dc.contributor.authorMangraviti, Giovanni
dc.contributor.authorKapusuz, Kamil Yavuz
dc.contributor.authorPark, Sehoon
dc.contributor.authorGlassee, Miguel
dc.contributor.authorLemey, Sam
dc.contributor.authorWambacq, Piet
dc.contributor.authorGramegna, Giuseppe
dc.date.accessioned2026-01-26T12:27:59Z
dc.date.available2026-01-26T12:27:59Z
dc.date.createdwos2025-10-18
dc.date.issued2025
dc.description.abstractThis article presents a 4-way transmitter (TX) array suitable for beamforming operation at D-band. The transmitter is implemented using zero-IF architecture with LO beamforming. The signal path comprises an I/Q baseband (BB) section, direct up-conversion, and a power amplifier chain, supporting a wideband operation from 118 to 147 GHz. A 5-stage 2-way power amplifier chain provides a saturation output power up to 11 dBm. The probing measurement results demonstrate up to 64 quadrature amplitude modulation (64QAM) [30 Gb/s at −25 dB rms-error vector magnitude (EVM)] and achieve a data rate of 56 Gb/s with a −17 dB rms-EVM at an output power of 3 dBm using 16QAM modulation. The LO chain contains a 14–16 GHz buffer, a cascade of two frequency triplers for LO generation at D-band using an external LO reference. A tunable matching network with 6-bit capacitor-band control is implemented in the buffer stage together with a polarity switch to achieve full range phase control. An efficient I/Q generation scheme is implemented by exploiting the last tripler before the I/Q mixer: two LC buffers after 1st tripler generates ±15° phase offset. This results into ±45° phase offset after the 2nd tripler. The benefits of our sub-harmonic I/Q generation are: 1) no I/Q hybrid operating in D-Band is needed; 2) the limited ±15° phase offset required allows an easy LC tuned buffer implementation with limited amplitude variation across phase range; and 3) this amplitude variation is removed by 2nd tripler and LO buffers that operate at saturation level. This LO beamforming scheme ensures a phase resolution of 0.1° in measurement. A single TX channel draws 232 mW from a 0.8 V supply and has an area of 1.17×0.3 mm2 in a 22 nm fully depleted silicon on insulator (FD-SOI) process. The 4-way beamformer IC has been flip-chip mounted on a low-cost 10-layer printed circuit board (PCB) and connected to a planar antenna array integrated at the backside of the PCB. The antennas are placed with 1.1 mm spacing and each antenna contains 4 aperture-coupled patch units to enhance the radiation pattern. The 4-way TX beamformer has been tested over-the-air (OTA) with a reference receiver achieving 24 Gb/s with −25 dB rms-EVM at 0.4 m distance using 5G NR waveforms.
dc.identifier.doi10.1109/TMTT.2025.3613831
dc.identifier.issn0018-9480
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/58724
dc.language.isoeng
dc.provenance.editstepusergreet.vanhoof@imec.be
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
dc.source.beginpage10904
dc.source.endpage10914
dc.source.issue12
dc.source.journalIEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
dc.source.numberofpages11
dc.source.volume73
dc.subject.keywordsCHIPSET
dc.subject.keywordsMODULE
dc.title

A 56 Gb/s Zero-IF D-Band Beamforming Transmitter in 22 nm FD-SOI

dc.typeJournal article
dspace.entity.typePublication
imec.internal.crawledAt2025-10-22
imec.internal.sourcecrawler
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