Publication:
Scaling CMOS: finding the gate stack with the lowest leakage current
Date
| dc.contributor.author | Kauerauf, Thomas | |
| dc.contributor.author | Govoreanu, Bogdan | |
| dc.contributor.author | Degraeve, Robin | |
| dc.contributor.author | Groeseneken, Guido | |
| dc.contributor.author | Maes, Herman | |
| dc.contributor.imecauthor | Govoreanu, Bogdan | |
| dc.contributor.imecauthor | Degraeve, Robin | |
| dc.contributor.imecauthor | Groeseneken, Guido | |
| dc.date.accessioned | 2021-10-16T02:28:16Z | |
| dc.date.available | 2021-10-16T02:28:16Z | |
| dc.date.issued | 2005-04 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/10682 | |
| dc.source.beginpage | 695 | |
| dc.source.endpage | 701 | |
| dc.source.journal | Solid-State Electronics | |
| dc.source.volume | 49 | |
| dc.title | Scaling CMOS: finding the gate stack with the lowest leakage current | |
| dc.type | Journal article | |
| dspace.entity.type | Publication | |
| Files | ||
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