Publication:
A 2Mbit Digital in-Memory Computing Matrix-Vector Multiplier for DNN Inference supporting flexible bit precision and matrix size achieving 612 binary TOPS/W
| dc.contributor.author | Gupta, Mohit | |
| dc.contributor.author | Cosemans, Stefan | |
| dc.contributor.author | Debacker, Peter | |
| dc.contributor.author | Dehaene, Wim | |
| dc.contributor.imecauthor | Debacker, Peter | |
| dc.contributor.orcidimec | Debacker, Peter::0000-0003-3825-5554 | |
| dc.date.accessioned | 2023-12-19T08:54:36Z | |
| dc.date.available | 2023-11-12T17:45:38Z | |
| dc.date.available | 2023-12-19T08:54:36Z | |
| dc.date.issued | 2023 | |
| dc.identifier.doi | 10.1109/ESSCIRC59616.2023.10268763 | |
| dc.identifier.eisbn | 979-8-3503-0420-6 | |
| dc.identifier.issn | 1930-8833 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/43139 | |
| dc.publisher | IEEE | |
| dc.source.beginpage | 417 | |
| dc.source.conference | IEEE 49th European Solid-State Circuits Conference (ESSCIRC) | |
| dc.source.conferencedate | SEP 11-14, 2023 | |
| dc.source.conferencelocation | Lisbon | |
| dc.source.endpage | 420 | |
| dc.source.journal | na | |
| dc.source.numberofpages | 4 | |
| dc.title | A 2Mbit Digital in-Memory Computing Matrix-Vector Multiplier for DNN Inference supporting flexible bit precision and matrix size achieving 612 binary TOPS/W | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
| Files | ||
| Publication available in collections: |