Publication:

Wafer level packaging technology for low-loss on-chip transmission lines and inductors

Date

2003
Proceedings Paper
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dc.contributor.authorCarchon, Geert
dc.contributor.authorSun, Xiao
dc.contributor.authorDe Raedt, Walter
dc.contributor.authorBeyne, Eric
dc.contributor.imecauthorSun, Xiao
dc.contributor.imecauthorDe Raedt, Walter
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecDe Raedt, Walter::0000-0002-7117-7976
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.date.accessioned2021-10-15T04:06:16Z
dc.date.available2021-10-15T04:06:16Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7285
dc.source.conferenceIMAPS
dc.source.conferencedate16/11/2003
dc.source.conferencelocationBoston, MA USA
dc.title

Wafer level packaging technology for low-loss on-chip transmission lines and inductors

dc.typeProceedings paper
dspace.entity.typePublication
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