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A fully planar stacked gate flash technology with T-shaped floating gate for increased cell coupling ratio

Date

2007
Proceedings Paper
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dc.contributor.authorDe Vos, Joeri
dc.contributor.authorHaspeslagh, Luc
dc.contributor.authorBlomme, Pieter
dc.contributor.authorDemand, Marc
dc.contributor.authorDevriendt, Katia
dc.contributor.authorVleugels, Frank
dc.contributor.authorWellekens, Dirk
dc.contributor.authorVan Houdt, Jan
dc.contributor.imecauthorDe Vos, Joeri
dc.contributor.imecauthorHaspeslagh, Luc
dc.contributor.imecauthorBlomme, Pieter
dc.contributor.imecauthorDemand, Marc
dc.contributor.imecauthorDevriendt, Katia
dc.contributor.imecauthorVleugels, Frank
dc.contributor.imecauthorWellekens, Dirk
dc.contributor.imecauthorVan Houdt, Jan
dc.contributor.orcidimecDe Vos, Joeri::0000-0002-9332-9336
dc.contributor.orcidimecDevriendt, Katia::0000-0002-0662-7926
dc.contributor.orcidimecVan Houdt, Jan::0000-0003-1381-6925
dc.date.accessioned2021-10-16T15:37:40Z
dc.date.available2021-10-16T15:37:40Z
dc.date.issued2007
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/11996
dc.source.beginpage243
dc.source.conferenceProceedings 2nd International Conference on Memory Technology and Design - ICMTD
dc.source.conferencedate7/05/2007
dc.source.conferencelocationGiens France
dc.source.endpage245
dc.title

A fully planar stacked gate flash technology with T-shaped floating gate for increased cell coupling ratio

dc.typeProceedings paper
dspace.entity.typePublication
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