Publication:
Toward better wireload models in the presence of obstacles
Date
| dc.contributor.author | Cheng, C.K. | |
| dc.contributor.author | Kahng, A.B. | |
| dc.contributor.author | Liu, Bao | |
| dc.contributor.author | Stroobandt, Dirk | |
| dc.date.accessioned | 2021-10-14T21:14:05Z | |
| dc.date.available | 2021-10-14T21:14:05Z | |
| dc.date.issued | 2002 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/6104 | |
| dc.source.beginpage | 177 | |
| dc.source.endpage | 189 | |
| dc.source.issue | 2 | |
| dc.source.journal | IEEE Trans. Very Large Scale Integration (VLSI) Systems | |
| dc.source.volume | 10 | |
| dc.title | Toward better wireload models in the presence of obstacles | |
| dc.type | Journal article | |
| dspace.entity.type | Publication | |
| Files | ||
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