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Optimization of a silicone under the bump (SUB) structure for wafer level packaging

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dc.contributor.authorGonzalez, Mario
dc.contributor.authorVandevelde, Bart
dc.contributor.authorVanden Bulcke, Mathieu
dc.contributor.authorWinters, Christophe
dc.contributor.authorBeyne, Eric
dc.contributor.authorLee, Y.J.
dc.contributor.authorLarson, L.
dc.contributor.authorHarkness, B.R.
dc.contributor.authorMohamed, M.
dc.contributor.authorMeynen, H.
dc.contributor.imecauthorGonzalez, Mario
dc.contributor.imecauthorVandevelde, Bart
dc.contributor.imecauthorVanden Bulcke, Mathieu
dc.contributor.imecauthorWinters, Christophe
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecVandevelde, Bart::0000-0002-6753-6438
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.date.accessioned2021-10-15T04:48:52Z
dc.date.available2021-10-15T04:48:52Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7619
dc.source.beginpage479
dc.source.conferenceProceedings of the 14th European Microelectronic Packaging Conference and Exhibition - IMAPS Europe
dc.source.conferencedate23/06/2003
dc.source.conferencelocationFriedrichshafen Germany
dc.source.endpage484
dc.title

Optimization of a silicone under the bump (SUB) structure for wafer level packaging

dc.typeProceedings paper
dspace.entity.typePublication
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