Publication:

Breaking a fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves

Date

2020
Proceedings Paper
https://doi.org/10.1109/DSD51259.2020.00051
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dc.contributor.authorKabin, Ievgen
dc.contributor.authorDyka, Zoya
dc.contributor.authorKlann, Dan
dc.contributor.authorMentens, Nele
dc.contributor.authorBatina, Lejla
dc.contributor.authorLangendoerfer, Peter
dc.contributor.imecauthorMentens, Nele
dc.contributor.orcidimecMentens, Nele::0000-0001-8753-7895
dc.date.accessioned2022-01-06T14:01:47Z
dc.date.available2021-11-02T16:03:15Z
dc.date.available2022-01-06T14:01:47Z
dc.date.issued2020
dc.identifier.doi10.1109/DSD51259.2020.00051
dc.identifier.eisbn978-1-7281-9535-3
dc.identifier.issnna
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/38038
dc.publisherIEEE COMPUTER SOC
dc.source.beginpage270
dc.source.conference23rd Euromicro Conference on Digital System Design (DSD)
dc.source.conferencedateAUG 26-28, 2020
dc.source.conferencelocationKranj, Slovenia
dc.source.endpage276
dc.source.journalna
dc.source.numberofpages7
dc.title

Breaking a fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves

dc.typeProceedings paper
dspace.entity.typePublication
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