Publication:

Optimization of gate-on-source-only tunnel FETs with counter-doped pockets

Date

2012
Journal article
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dc.contributor.authorKao, Frank
dc.contributor.authorVerhulst, Anne
dc.contributor.authorVandenberghe, William
dc.contributor.authorSoree, Bart
dc.contributor.authorMagnus, Wim
dc.contributor.authorLeonelli, Daniele
dc.contributor.authorGroeseneken, Guido
dc.contributor.authorDe Meyer, Kristin
dc.contributor.imecauthorKao, Frank
dc.contributor.imecauthorVerhulst, Anne
dc.contributor.imecauthorSoree, Bart
dc.contributor.imecauthorMagnus, Wim
dc.contributor.imecauthorLeonelli, Daniele
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.imecauthorDe Meyer, Kristin
dc.contributor.orcidimecVerhulst, Anne::0000-0002-3742-9017
dc.contributor.orcidimecSoree, Bart::0000-0002-4157-1956
dc.date.accessioned2021-10-20T12:05:53Z
dc.date.available2021-10-20T12:05:53Z
dc.date.embargo9999-12-31
dc.date.issued2012
dc.identifier.issn0018-9383
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/20904
dc.source.beginpage2070
dc.source.endpage2077
dc.source.issue8
dc.source.journalIEEE Transactions on Electron Devices
dc.source.volume59
dc.title

Optimization of gate-on-source-only tunnel FETs with counter-doped pockets

dc.typeJournal article
dspace.entity.typePublication
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