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Method for endurance optimization of the HIMOStm flash memory cell in a 90nm CMOS technology
Publication:
Method for endurance optimization of the HIMOStm flash memory cell in a 90nm CMOS technology
Date
2005
Proceedings Paper
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APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Yao, T.
;
Lowe, A.
;
Vermeulen, T.
;
Bellafiore, N.
;
Van Houdt, Jan
;
Wellekens, Dirk
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1841
since deposited on 2021-10-16
Acq. date: 2025-10-28
Citations
Metrics
Views
1841
since deposited on 2021-10-16
Acq. date: 2025-10-28
Citations