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Leveraging lessons-learned on 2D-SOCs in designing parallel TAMs for 3D-SICs based on IEEE Std 1838's flexible parallel port

Date

2020
Proceedings Paper
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dc.contributor.authorMarinissen, Erik Jan
dc.contributor.imecauthorMarinissen, Erik Jan
dc.contributor.orcidimecMarinissen, Erik Jan::0000-0002-5058-8303
dc.date.accessioned2021-10-29T00:32:50Z
dc.date.available2021-10-29T00:32:50Z
dc.date.embargo9999-12-31
dc.date.issued2020
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/35549
dc.identifier.urlhttps://www.3dincites.com/wp-content/uploads/3DCTEST2020advProgram.pdf
dc.source.conference7th IEEE International Workshop on Testing Three-Dimensional, Chiplet-Based, and Stacked ICs (3DC-TEST2020)
dc.source.conferencedate5/11/2020
dc.source.conferencelocationonline
dc.title

Leveraging lessons-learned on 2D-SOCs in designing parallel TAMs for 3D-SICs based on IEEE Std 1838's flexible parallel port

dc.typeProceedings paper
dspace.entity.typePublication
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