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Wafer reconstruction: An alternative 3D integration process flow

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dc.contributor.authorWang, Teng
dc.contributor.authorSilva, J.L.
dc.contributor.authorDaily, Robert
dc.contributor.authorCapuz, Giovanni
dc.contributor.authorGonzalez, Mario
dc.contributor.authorRebibis, Kenneth June
dc.contributor.authorKroehnert, S.
dc.contributor.authorBeyne, Eric
dc.contributor.imecauthorCapuz, Giovanni
dc.contributor.imecauthorGonzalez, Mario
dc.contributor.imecauthorRebibis, Kenneth June
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecCapuz, Giovanni::0000-0002-5263-4836
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.date.accessioned2021-10-21T14:28:33Z
dc.date.available2021-10-21T14:28:33Z
dc.date.issued2013
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/23378
dc.identifier.urlhttps://ieeexplore.ieee.org/document/6745754
dc.source.conference2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013)
dc.source.conferencedate12/12/2013
dc.source.conferencelocationSingapore Singapore
dc.title

Wafer reconstruction: An alternative 3D integration process flow

dc.typeProceedings paper
dspace.entity.typePublication
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