Publication:
Cu interconnects and low-K dielectrics, challenges for chip packaging
Date
| dc.contributor.author | Beyne, Eric | |
| dc.contributor.imecauthor | Beyne, Eric | |
| dc.contributor.orcidimec | Beyne, Eric::0000-0002-3096-050X | |
| dc.date.accessioned | 2021-10-14T21:08:57Z | |
| dc.date.available | 2021-10-14T21:08:57Z | |
| dc.date.issued | 2002 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/6013 | |
| dc.source.beginpage | May-15 | |
| dc.source.conference | The 5th International Forum on Semiconductor Technology - IFST | |
| dc.source.conferencedate | 21/02/2002 | |
| dc.source.conferencelocation | Yokohama Japan | |
| dc.source.endpage | May-17 | |
| dc.title | Cu interconnects and low-K dielectrics, challenges for chip packaging | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
| Files | ||
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