Publication:
Transistor Aging and Circuit Reliability at Cryogenic Temperatures
Date
| cris.virtual.department | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.department | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.orcid | 0000-0002-8186-071X | |
| cris.virtual.orcid | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtualsource.department | 0328af28-0868-452b-9c77-facda8733c82 | |
| cris.virtualsource.department | 3ad0df6b-3c58-44ca-bf83-35e727253000 | |
| cris.virtualsource.orcid | 0328af28-0868-452b-9c77-facda8733c82 | |
| cris.virtualsource.orcid | 3ad0df6b-3c58-44ca-bf83-35e727253000 | |
| dc.contributor.author | Diaz Fortuny, Javier | |
| dc.contributor.author | Nayar, Vishal | |
| dc.contributor.imecauthor | Diaz-Fortuny, Javier | |
| dc.contributor.imecauthor | Nayar, Vishal | |
| dc.date.accessioned | 2025-08-03T03:58:24Z | |
| dc.date.available | 2025-08-03T03:58:24Z | |
| dc.date.issued | 2025 | |
| dc.description.wosFundingText | This work was supported in part by the CyberSecurity Research Flanders with reference number VR20192203. | |
| dc.identifier.eisbn | 978-3-9826741-0-0 | |
| dc.identifier.issn | 1530-1591 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/46021 | |
| dc.publisher | IEEE | |
| dc.source.beginpage | 1 | |
| dc.source.conference | 2025 Design, Automation & Test in Europe Conference-DATE | |
| dc.source.conferencedate | 2025-03-31 | |
| dc.source.conferencelocation | Lyon | |
| dc.source.journal | Proceedings of 2025 Design, Automation & Test in Europe Conference (DATE) | |
| dc.source.numberofpages | 4 | |
| dc.title | Transistor Aging and Circuit Reliability at Cryogenic Temperatures | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
| Files | ||
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