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Articles
Memory power reduction for high-speed implementation of turbo codes
Publication:
Memory power reduction for high-speed implementation of turbo codes
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Date
2003
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APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Bougard, Bruno
;
Van der Perre, Liesbet
;
Maessen, Francien
;
Giulietti, Alexandre
;
Derudder, Veerle
;
Catthoor, Francky
Journal
Journal of VLSI Signal Processing
Abstract
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2013
since deposited on 2021-10-15
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Acq. date: 2026-01-25
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Views
2013
since deposited on 2021-10-15
2
last month
2
last week
Acq. date: 2026-01-25
Citations