Publication:

Switching layer optimization in Co-based CBRAM for >10 5 memory window in sub-100 µA regime

 
dc.contributor.authorCho, Yongjun
dc.contributor.authorKang, Bo Soo
dc.contributor.authorKumbhare, Pankaj
dc.contributor.authorDelhougne, Romain
dc.contributor.authorNyns, Laura
dc.contributor.authorMao, Ming
dc.contributor.authorGoux, Ludovic
dc.contributor.authorKar, Gouri Sankar
dc.contributor.authorBelmonte, Attilio
dc.contributor.imecauthorKumbhare, Pankaj
dc.contributor.imecauthorDelhougne, Romain
dc.contributor.imecauthorNyns, Laura
dc.contributor.imecauthorMao, Ming
dc.contributor.imecauthorGoux, Ludovic
dc.contributor.imecauthorKar, Gouri Sankar
dc.contributor.imecauthorBelmonte, Attilio
dc.contributor.orcidimecDelhougne, Romain::0009-0009-0129-709X
dc.contributor.orcidimecNyns, Laura::0000-0001-8220-870X
dc.contributor.orcidimecGoux, Ludovic::0000-0002-1276-2278
dc.contributor.orcidimecBelmonte, Attilio::0000-0002-3947-1948
dc.date.accessioned2025-04-10T12:30:03Z
dc.date.available2024-11-10T17:03:54Z
dc.date.available2025-04-10T12:30:03Z
dc.date.issued2024
dc.description.wosFundingTextThis research was supported by the MOTIE (Ministry of Trade, Industry, and Energy) in Korea, under the Fostering Global Talents for Innovative Growth Program (P0008745) supervised by the Korea Institute for Advancement of Technology (MAT) . This project has also received funding from the Electronic Component Systems for European Leadership Joint undertaking under grant agreement No 692519. This Joint undertaking receives support from the European Union's Horizon 2020 research and innovation programme and Belgium, Germany, France, Netherlands, Poland, United Kingdom.
dc.identifier.doi10.1016/j.sse.2024.108964
dc.identifier.issn0038-1101
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/44762
dc.publisherPERGAMON-ELSEVIER SCIENCE LTD
dc.source.beginpageArt. 108964
dc.source.endpageN/A
dc.source.issueSeptember
dc.source.journalSOLID-STATE ELECTRONICS
dc.source.numberofpages4
dc.source.volume219
dc.subject.keywordsRESISTIVE MEMORY
dc.subject.keywordsFILAMENT
dc.title

Switching layer optimization in Co-based CBRAM for >10 5 memory window in sub-100 µA regime

dc.typeJournal article
dspace.entity.typePublication
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