Publication:

III-V Nanowire Epitaxy for Ultimate Logic Device Scaling

Date

2017-10
Dissertation
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dc.contributor.authorLiu, Ziyang
dc.contributor.thesisadvisorHeyns, Marc
dc.date.accessioned2021-10-24T08:07:11Z
dc.date.available2021-10-24T08:07:11Z
dc.date.embargo9999-12-31
dc.date.issued2017-10
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/28840
dc.identifier.urlhttps://lirias.kuleuven.be/handle/123456789/591999
dc.title

III-V Nanowire Epitaxy for Ultimate Logic Device Scaling

dc.typePHD thesis
dspace.entity.typePublication
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