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RTP requirements for CMOS integration of dual work function phase controlled Ni-FUSI (fully silicided) gates with simultaneous silicidation of nMOS (NiSi) and pMOS (Ni-rich silicide) gates on HfSiON

Date

2008
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dc.contributor.authorLauwers, Anne
dc.contributor.authorKittl, Jorge
dc.contributor.authorMaex, Karen
dc.contributor.imecauthorLauwers, Anne
dc.contributor.imecauthorMaex, Karen
dc.date.accessioned2021-10-17T08:11:30Z
dc.date.available2021-10-17T08:11:30Z
dc.date.embargo9999-12-31
dc.date.issued2008
dc.identifier.issn0255-5476
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/13994
dc.source.beginpage341
dc.source.endpage351
dc.source.journalMaterials Science Forum
dc.source.volume573-574
dc.title

RTP requirements for CMOS integration of dual work function phase controlled Ni-FUSI (fully silicided) gates with simultaneous silicidation of nMOS (NiSi) and pMOS (Ni-rich silicide) gates on HfSiON

dc.typeJournal article
dspace.entity.typePublication
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