Publication:
In-memory realization of SHA-2 using ReVAMP architecture
| dc.contributor.author | Bhattacharjee, Debjyoti | |
| dc.contributor.author | Majumder, Anirban | |
| dc.contributor.author | Chattopadhyay, Anupam | |
| dc.contributor.imecauthor | Bhattacharjee, Debjyoti | |
| dc.contributor.orcidext | Majumder, Anirban::0000-0001-6937-8675 | |
| dc.contributor.orcidext | Chattopadhyay, Anupam::0000-0002-8818-6983 | |
| dc.contributor.orcidimec | Bhattacharjee, Debjyoti::0000-0001-6561-8934 | |
| dc.date.accessioned | 2023-08-08T08:27:16Z | |
| dc.date.available | 2023-06-20T10:37:41Z | |
| dc.date.available | 2023-08-08T08:27:16Z | |
| dc.date.issued | 2021 | |
| dc.identifier.doi | 10.1109/VLSID51830.2021.00013 | |
| dc.identifier.eisbn | 978-1-6654-4087-5 | |
| dc.identifier.issn | 1063-9667 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/41983 | |
| dc.publisher | IEEE | |
| dc.source.beginpage | 47 | |
| dc.source.conference | 34th International Conference on VLSI Design / 20th International Conference on Embedded Systems (VLSID) | |
| dc.source.conferencedate | FEB 20-24, 2021 | |
| dc.source.conferencelocation | Guwahati | |
| dc.source.endpage | 53 | |
| dc.source.journal | na | |
| dc.source.numberofpages | 7 | |
| dc.title | In-memory realization of SHA-2 using ReVAMP architecture | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
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