Publication:

Vertical nanowire TFET diameter influence on intrinsic voltage gain for different inversion conditions

Date

2015
Proceedings Paper
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dc.contributor.authorSivieri, V.B.
dc.contributor.authorBordallo, Caio
dc.contributor.authorAgopian, Paula G.D.
dc.contributor.authorMartino, Joao Antonio
dc.contributor.authorRooyackers, Rita
dc.contributor.authorVandooren, Anne
dc.contributor.authorSimoen, Eddy
dc.contributor.authorThean, Aaron
dc.contributor.authorClaeys, Cor
dc.contributor.imecauthorVandooren, Anne
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.imecauthorThean, Aaron
dc.contributor.orcidimecVandooren, Anne::0000-0002-2412-0176
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.date.accessioned2021-10-22T22:59:52Z
dc.date.available2021-10-22T22:59:52Z
dc.date.issued2015
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/25922
dc.identifier.urlhttp://ecst.ecsdl.org/content/66/5/187.abstract
dc.source.beginpage187
dc.source.conferenceAdvanced CMOS-Compatible Semiconductor Devices 17
dc.source.conferencedate24/05/2015
dc.source.conferencelocationChicago, IL USA
dc.source.endpage192
dc.title

Vertical nanowire TFET diameter influence on intrinsic voltage gain for different inversion conditions

dc.typeProceedings paper
dspace.entity.typePublication
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