Metrology and inspection requirements for successful stacking of integrated circuits

dc.contributor.author	Halder, Sandip
dc.contributor.author	Miller, Andy
dc.contributor.author	Van Puymbroeck, Jan
dc.contributor.author	Nieuborg, Nancy
dc.contributor.author	Beyne, Eric
dc.contributor.imecauthor	Halder, Sandip
dc.contributor.imecauthor	Miller, Andy
dc.contributor.imecauthor	Van Puymbroeck, Jan
dc.contributor.imecauthor	Beyne, Eric
dc.contributor.orcidimec	Halder, Sandip::0000-0002-6314-2685
dc.contributor.orcidimec	Beyne, Eric::0000-0002-3096-050X
dc.date.accessioned	2021-10-22T01:49:29Z
dc.date.available	2021-10-22T01:49:29Z
dc.date.embargo	9999-12-31
dc.date.issued	2014
dc.identifier.issn	0894-6507
dc.identifier.uri	https://imec-publications.be/handle/20.500.12860/23900
dc.identifier.url	http://ieeexplore.ieee.org/document/6869040/?arnumber=6869040
dc.source.beginpage	370
dc.source.endpage	376
dc.source.issue	3
dc.source.journal	IEEE Transactions on Semiconductor Manufacturing
dc.source.volume	27
dc.title	Metrology and inspection requirements for successful stacking of integrated circuits
dc.type	Journal article
dspace.entity.type	Publication
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