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Integrating system-level low power methodologies into a real-life design flow

Date

1999
Proceedings Paper
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dc.contributor.authorBormans, Jan
dc.contributor.authorDenolf, Kristof
dc.contributor.authorWuytack, Sven
dc.contributor.authorNachtergaele, Lode
dc.contributor.authorBolsens, Ivo
dc.date.accessioned2021-10-06T10:44:19Z
dc.date.available2021-10-06T10:44:19Z
dc.date.embargo9999-12-31
dc.date.issued1999
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/3255
dc.source.beginpage19
dc.source.conferenceProceedings IEEE Workshop on Power and Timing Modeling, Optimization and Simulation - PATMOS
dc.source.conferencedate6/10/1999
dc.source.conferencelocationKos Greece
dc.source.endpage28
dc.title

Integrating system-level low power methodologies into a real-life design flow

dc.typeProceedings paper
dspace.entity.typePublication
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