Publication:
Versatile Potential and Full-Well Capacity Modeling of Vertical Pinned Photodiodes
| cris.virtual.department | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.department | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.department | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.orcid | 0000-0002-4019-5979 | |
| cris.virtual.orcid | 0000-0003-3738-4872 | |
| cris.virtual.orcid | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtualsource.department | 73187a2f-4799-45d3-9ae1-7cd599fe36b8 | |
| cris.virtualsource.department | abfe18c0-25b9-4e7c-8082-60bfa1ba60e2 | |
| cris.virtualsource.department | 69a83b1b-e83f-42b4-afb5-5189331192f2 | |
| cris.virtualsource.orcid | 73187a2f-4799-45d3-9ae1-7cd599fe36b8 | |
| cris.virtualsource.orcid | abfe18c0-25b9-4e7c-8082-60bfa1ba60e2 | |
| cris.virtualsource.orcid | 69a83b1b-e83f-42b4-afb5-5189331192f2 | |
| dc.contributor.author | Bak, Jiwon | |
| dc.contributor.author | Jin, Minhyun | |
| dc.contributor.author | Ahn, Hyeonsoo | |
| dc.contributor.author | Hwang, Jae-Hyeok | |
| dc.contributor.author | Kang, Jungwoo | |
| dc.contributor.author | Lee, Haewon | |
| dc.contributor.author | Lee, Kyungho | |
| dc.contributor.author | Genoe, Jan | |
| dc.contributor.author | Lee, Jiwon | |
| dc.date.accessioned | 2026-09-16T08:33:28Z | |
| dc.date.available | 2026-09-16T08:33:28Z | |
| dc.date.createdwos | 2026 | |
| dc.date.issued | 2026 | |
| dc.description.abstract | As pixel sizes shrink to support higher-resolution imaging, the pinned photodiode (PPD) structure in CMOS image sensors (CISs) has evolved into a 3-D configuration, rendering conventional PPD models insufficient to accurately describe the potential distribution and full-well capacity (FWC). This article presents a novel physics-based vertical PPD model to characterize the internal potential distribution of the PPD and derive its FWC by solving Poisson’s equation in three dimensions. The validity of the proposed model is confirmed through comparison with both technology computer-aided design (TCAD) simulations and experimental measurements. Vertical PPDs with five different doping conditions were fabricated using a Samsung CIS process with a pixel pitch of 0.7 μ m to experimentally validate the proposed model. Relative to TCAD simulations, the proposed model predicts the pinning voltage and FWC with average errors of 2.76% and 5.59%, respectively, while comparison with experimental measurements shows an average FWC error of 2.07%. These results indicate that the model can support fast and accurate prediction in the early development stage, providing a reliable and efficient framework for the design and optimization of PPDs in CISs. | |
| dc.description.wosFundingText | This work was supported in part by Samsung Electronics Company Ltd. under Grant IO240415-09581-01 and in part by Korea Institute for Advancement of Technology (KIAT) through Korean Government Ministry of Trade, Industry and Energy (MOTIE) (Human Resources Development (HRD) Program for Industrial Innovation) under Grant RS-2024-00401466. | |
| dc.identifier.doi | 10.1109/jsen.2026.3710995 | |
| dc.identifier.eissn | 1558-1748 | |
| dc.identifier.issn | 1530-437X | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/60380 | |
| dc.language.iso | eng | |
| dc.provenance.editstepuser | greet.vanhoof@imec.be | |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | |
| dc.source.beginpage | 25928 | |
| dc.source.endpage | 25938 | |
| dc.source.issue | 17 | |
| dc.source.journal | IEEE Sensors Journal | |
| dc.source.journal | IEEE SENSORS JOURNAL | |
| dc.source.numberofpages | 11 | |
| dc.source.volume | 26 | |
| dc.subject.keywords | CMOS IMAGE SENSORS | |
| dc.title | Versatile Potential and Full-Well Capacity Modeling of Vertical Pinned Photodiodes | |
| dc.type | Journal article | |
| dspace.entity.type | Publication | |
| imec.internal.crawledAt | 2026-07-14 | |
| imec.internal.source | crawler | |
| imec.internal.wosCreatedAt | 2026-09-15 | |
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