Publication:

Versatile Potential and Full-Well Capacity Modeling of Vertical Pinned Photodiodes

 
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid0000-0002-4019-5979
cris.virtual.orcid0000-0003-3738-4872
cris.virtual.orcid#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtualsource.department73187a2f-4799-45d3-9ae1-7cd599fe36b8
cris.virtualsource.departmentabfe18c0-25b9-4e7c-8082-60bfa1ba60e2
cris.virtualsource.department69a83b1b-e83f-42b4-afb5-5189331192f2
cris.virtualsource.orcid73187a2f-4799-45d3-9ae1-7cd599fe36b8
cris.virtualsource.orcidabfe18c0-25b9-4e7c-8082-60bfa1ba60e2
cris.virtualsource.orcid69a83b1b-e83f-42b4-afb5-5189331192f2
dc.contributor.authorBak, Jiwon
dc.contributor.authorJin, Minhyun
dc.contributor.authorAhn, Hyeonsoo
dc.contributor.authorHwang, Jae-Hyeok
dc.contributor.authorKang, Jungwoo
dc.contributor.authorLee, Haewon
dc.contributor.authorLee, Kyungho
dc.contributor.authorGenoe, Jan
dc.contributor.authorLee, Jiwon
dc.date.accessioned2026-09-16T08:33:28Z
dc.date.available2026-09-16T08:33:28Z
dc.date.createdwos2026
dc.date.issued2026
dc.description.abstractAs pixel sizes shrink to support higher-resolution imaging, the pinned photodiode (PPD) structure in CMOS image sensors (CISs) has evolved into a 3-D configuration, rendering conventional PPD models insufficient to accurately describe the potential distribution and full-well capacity (FWC). This article presents a novel physics-based vertical PPD model to characterize the internal potential distribution of the PPD and derive its FWC by solving Poisson’s equation in three dimensions. The validity of the proposed model is confirmed through comparison with both technology computer-aided design (TCAD) simulations and experimental measurements. Vertical PPDs with five different doping conditions were fabricated using a Samsung CIS process with a pixel pitch of 0.7 μ m to experimentally validate the proposed model. Relative to TCAD simulations, the proposed model predicts the pinning voltage and FWC with average errors of 2.76% and 5.59%, respectively, while comparison with experimental measurements shows an average FWC error of 2.07%. These results indicate that the model can support fast and accurate prediction in the early development stage, providing a reliable and efficient framework for the design and optimization of PPDs in CISs.
dc.description.wosFundingTextThis work was supported in part by Samsung Electronics Company Ltd. under Grant IO240415-09581-01 and in part by Korea Institute for Advancement of Technology (KIAT) through Korean Government Ministry of Trade, Industry and Energy (MOTIE) (Human Resources Development (HRD) Program for Industrial Innovation) under Grant RS-2024-00401466.
dc.identifier.doi10.1109/jsen.2026.3710995
dc.identifier.eissn1558-1748
dc.identifier.issn1530-437X
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/60380
dc.language.isoeng
dc.provenance.editstepusergreet.vanhoof@imec.be
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
dc.source.beginpage25928
dc.source.endpage25938
dc.source.issue17
dc.source.journalIEEE Sensors Journal
dc.source.journalIEEE SENSORS JOURNAL
dc.source.numberofpages11
dc.source.volume26
dc.subject.keywordsCMOS IMAGE SENSORS
dc.title

Versatile Potential and Full-Well Capacity Modeling of Vertical Pinned Photodiodes

dc.typeJournal article
dspace.entity.typePublication
imec.internal.crawledAt2026-07-14
imec.internal.sourcecrawler
imec.internal.wosCreatedAt2026-09-15
Files
Publication available in collections: