Publication:
Vertical Transistors: a Slippery Path towards the Ultimate CMOS Scaling
Date
| dc.contributor.author | Yakimets, Dmitry | |
| dc.contributor.imecauthor | Yakimets, Dmitry | |
| dc.contributor.thesisadvisor | De Meyer, Kristin | |
| dc.contributor.thesisadvisor | Collaert, Nadine | |
| dc.date.accessioned | 2021-10-24T19:31:41Z | |
| dc.date.available | 2021-10-24T19:31:41Z | |
| dc.date.embargo | 9999-12-31 | |
| dc.date.issued | 2017-01 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/29982 | |
| dc.identifier.url | https://limo.libis.be/primo-explore/fulldisplay?docid=LIRIAS1736137&context=L&vid=Lirias&search_scope=Lirias&tab=default_tab&lang=en_US&fromSitemap=1 | |
| dc.title | Vertical Transistors: a Slippery Path towards the Ultimate CMOS Scaling | |
| dc.type | PHD thesis | |
| dspace.entity.type | Publication | |
| Files | Original bundle
| |
| Publication available in collections: |