Publication:

3D wafer-level packaging die stacking using spin-on-dielectric polymer liner through-silicon vias

Date

2011
Journal article
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21094.pdf 1.19 MB

Author(s)

Civale, Yann
;
Sabuncuoglu Tezcan, Deniz  
;
Philipsen, Harold  
;
Duval, Fabrice  
;
Jaenen, Patrick  
;
Travaly, Youssef
;
Soussan, Philippe  
;
Swinnen, Bart  
;
Beyne, Eric  

Journal

IEEE Transactions on Components, Packaging and Manufacturing Technology

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1995 since deposited on 2021-10-19
Acq. date: 2026-04-25

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1995 since deposited on 2021-10-19
Acq. date: 2026-04-25

Citations