Publication:

Area-Efficient CFET Dual-port SRAM with Backside Interconnect

 
dc.contributor.authorAbdi, Dawit
dc.contributor.authorBrunion, Moritz
dc.contributor.authorGarcia Redondo, Fernando
dc.contributor.authorWeckx, Pieter
dc.contributor.authorBoemmels, Juergen
dc.contributor.authorVerschueren, Lynn
dc.contributor.authorFarokhnejad, Anita
dc.contributor.authorGarcia Bardon, Marie
dc.contributor.authorHellings, Geert
dc.contributor.authorRyckaert, Julien
dc.contributor.imecauthorAbdi, D.
dc.contributor.imecauthorBrunion, M.
dc.contributor.imecauthorGarcia-Redondo, F.
dc.contributor.imecauthorWeckx, P.
dc.contributor.imecauthorBoemmels, J.
dc.contributor.imecauthorVerschueren, L.
dc.contributor.imecauthorFarokhnejad, A.
dc.contributor.imecauthorGarcia-Bardon, M.
dc.contributor.imecauthorHellings, G.
dc.contributor.imecauthorRyckaert, J.
dc.date.accessioned2025-02-02T17:54:28Z
dc.date.available2025-02-02T17:54:28Z
dc.date.issued2024
dc.identifier.doi10.1109/ESSERC62670.2024.10719562
dc.identifier.eisbn979-8-3503-8813-8
dc.identifier.isbn979-8-3503-8814-5
dc.identifier.issn1930-8833
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/45147
dc.publisherIEEE
dc.source.beginpage21
dc.source.conference50th IEEE European Solid-State Electronics Research Conference (ESSERC)
dc.source.conferencedate2024-09-09
dc.source.conferencelocationBruges
dc.source.endpage24
dc.source.numberofpages4
dc.title

Area-Efficient CFET Dual-port SRAM with Backside Interconnect

dc.typeProceedings paper
dspace.entity.typePublication
Files
Publication available in collections: