Publication:

Vertical device architecture for 5nm and beyond: device & circuit implications

Date

2015
Proceedings Paper
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dc.contributor.authorThean, Aaron
dc.contributor.authorYakimets, Dmitry
dc.contributor.authorHuynh Bao, Trong
dc.contributor.authorSchuddinck, Pieter
dc.contributor.authorSakhare, Sushil
dc.contributor.authorGarcia Bardon, Marie
dc.contributor.authorSibaja-Hernandez, Arturo
dc.contributor.authorCiofi, Ivan
dc.contributor.authorEneman, Geert
dc.contributor.authorVeloso, Anabela
dc.contributor.authorRyckaert, Julien
dc.contributor.authorRaghavan, Praveen
dc.contributor.authorMercha, Abdelkarim
dc.contributor.authorMocuta, Anda
dc.contributor.authorTokei, Zsolt
dc.contributor.authorVerkest, Diederik
dc.contributor.authorWambacq, Piet
dc.contributor.authorDe Meyer, Kristin
dc.contributor.authorCollaert, Nadine
dc.contributor.imecauthorThean, Aaron
dc.contributor.imecauthorYakimets, Dmitry
dc.contributor.imecauthorSchuddinck, Pieter
dc.contributor.imecauthorGarcia Bardon, Marie
dc.contributor.imecauthorSibaja-Hernandez, Arturo
dc.contributor.imecauthorCiofi, Ivan
dc.contributor.imecauthorEneman, Geert
dc.contributor.imecauthorVeloso, Anabela
dc.contributor.imecauthorRyckaert, Julien
dc.contributor.imecauthorMercha, Abdelkarim
dc.contributor.imecauthorTokei, Zsolt
dc.contributor.imecauthorVerkest, Diederik
dc.contributor.imecauthorWambacq, Piet
dc.contributor.imecauthorDe Meyer, Kristin
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.orcidimecCiofi, Ivan::0000-0003-1374-4116
dc.contributor.orcidimecEneman, Geert::0000-0002-5849-3384
dc.contributor.orcidimecMercha, Abdelkarim::0000-0002-2174-6958
dc.contributor.orcidimecVerkest, Diederik::0000-0001-6567-2746
dc.contributor.orcidimecWambacq, Piet::0000-0003-4388-7257
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.date.accessioned2021-10-22T23:31:32Z
dc.date.available2021-10-22T23:31:32Z
dc.date.embargo9999-12-31
dc.date.issued2015
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/25990
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7223689
dc.source.beginpageT26
dc.source.conferenceIEEE Symposium on VLSI Technology
dc.source.conferencedate15/06/2015
dc.source.conferencelocationKyoto Japan
dc.source.endpageT27
dc.title

Vertical device architecture for 5nm and beyond: device & circuit implications

dc.typeProceedings paper
dspace.entity.typePublication
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