A fully 3-D BIE evaluation of the resistance and inductance of on-board and on-chip interconnects

dc.contributor.author	Huynen, Martijn
dc.contributor.author	De Zutter, Daniel
dc.contributor.author	Vande Ginste, Dries
dc.contributor.imecauthor	Huynen, Martijn
dc.contributor.imecauthor	De Zutter, Daniel
dc.contributor.imecauthor	Vande Ginste, Dries
dc.contributor.orcidimec	Huynen, Martijn::0000-0002-5168-9421
dc.contributor.orcidimec	Vande Ginste, Dries::0000-0002-0178-288X
dc.date.accessioned	2021-10-25T20:07:29Z
dc.date.available	2021-10-25T20:07:29Z
dc.date.embargo	9999-12-31
dc.date.issued	2018
dc.identifier.uri	https://imec-publications.be/handle/20.500.12860/30932
dc.identifier.url	https://ieeexplore.ieee.org/document/8401653
dc.source.beginpage	1
dc.source.conference	IEEE 22nd Workshop on Signal and Power Integrity - SPI2018
dc.source.conferencedate	22/05/2018
dc.source.conferencelocation	Brest France
dc.source.endpage	4
dc.title	A fully 3-D BIE evaluation of the resistance and inductance of on-board and on-chip interconnects
dc.type	Proceedings paper
dspace.entity.type	Publication
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