Publication:

Design-Technology Co-Optimization of Sequential and Monolithic CFET as enabler of technology node beyond 2nm

Date

2021
Proceedings Paper
https://doi.org/10.1117/12.2583395
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dc.contributor.authorChehab, Bilal
dc.contributor.authorRyckaert, Julien
dc.contributor.authorSchuddinck, Pieter
dc.contributor.authorWeckx, Pieter
dc.contributor.authorHoriguchi, Naoto
dc.contributor.authorMirabelli, Gioele
dc.contributor.authorSpessot, Alessio
dc.contributor.authorNa, Myung Hee
dc.contributor.imecauthorChehab, Bilal
dc.contributor.imecauthorRyckaert, Julien
dc.contributor.imecauthorSchuddinck, Pieter
dc.contributor.imecauthorWeckx, Pieter
dc.contributor.imecauthorHoriguchi, Naoto
dc.contributor.imecauthorMirabelli, Gioele
dc.contributor.imecauthorSpessot, Alessio
dc.contributor.imecauthorNa, Myung Hee
dc.contributor.orcidimecHoriguchi, Naoto::0000-0001-5490-0416
dc.contributor.orcidimecMirabelli, Gioele::0000-0001-7060-4836
dc.date.accessioned2022-03-16T14:02:28Z
dc.date.available2022-03-16T14:02:28Z
dc.date.issued2021
dc.identifier.doi10.1117/12.2583395
dc.identifier.eisbn978-1-5106-4062-7
dc.identifier.issn0277-786X
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/39456
dc.publisherSPIE-INT SOC OPTICAL ENGINEERING
dc.source.conferenceConference on Design-Process-Technology Co-optimization XV
dc.source.conferencedateFEB 22-26, 2021
dc.source.conferencelocationVirtual
dc.source.journalna
dc.source.numberofpages5
dc.source.volume11614
dc.title

Design-Technology Co-Optimization of Sequential and Monolithic CFET as enabler of technology node beyond 2nm

dc.typeProceedings paper
dspace.entity.typePublication
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