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Using the self aligned field implant to design high voltage devices in sub-μm CMOS technologies

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dc.contributor.authorVermandel, Miguel
dc.contributor.authorDoutreloigne, Jan
dc.contributor.authorMoens, P.
dc.contributor.authorTack, Marnix
dc.contributor.imecauthorDoutreloigne, Jan
dc.date.accessioned2021-10-14T14:14:36Z
dc.date.available2021-10-14T14:14:36Z
dc.date.embargo9999-12-31
dc.date.issued2000
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/4915
dc.source.beginpage228
dc.source.conferenceProceedings of the 30th European Solid-State Device Research Conference - ESSDERC
dc.source.conferencedate11/09/2000
dc.source.conferencelocationCork Ireland
dc.source.endpage231
dc.title

Using the self aligned field implant to design high voltage devices in sub-μm CMOS technologies

dc.typeProceedings paper
dspace.entity.typePublication
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