A 3072:96 Multiplexed Neural Readout IC With Two-Step Incremental-SAR Conversion and Efficient Bulk-DAC-Based Offset Compensation

Abstract

High-resolution, large-scale neural recording from the cortical surface, using passive micro-electrocorticography ( μ ECoG) arrays paired with CMOS readout integrated circuits (ROICs), is fundamentally limited by interconnect bottlenecks. Emerging active multiplexing mitigates this; yet existing solutions often exhibit limitations in bandwidth and channel count. Furthermore, current DC-coupled recording analog front-ends (AFEs) suffer from degraded noise performance in the presence of large electrode DC offsets (EDOs). To address these challenges, this article presents a compact, low-power neural ROIC tailored for the acquisition of both low-frequency ECoG signals and wide-band cortical-surface action potentials (APs) from high-density active μ ECoG arrays. Employing 32:1 time-division multiplexing, our ROIC supports simultaneous recording from 3072 electrodes using 96 time-multiplexed channels (super-channels). To achieve high area and power efficiencies, each super-channel features two-step incremental-successive approximation register (I-SAR) conversion and embedded bulk-DACs (BDACs) for efficient EDO and comparator offset compensation. Fabricated in a 22-nm fully depleted silicon on insulator (FDSOI) process, this prototype neural ROIC achieves the highest channel count, the smallest effective per-channel area (0.0004 mm2), and the lowest per-channel power (438 nW), while maintaining a low input-referred noise (IRN) of 2.39 μVrms and 5.91 μVrms in the ECoG (1–300 Hz) and AP (0.3–7.5 kHz) bands, respectively. The ROIC’s ability to record multiplexed neural spikes has experimentally been demonstrated in saline.